For testing semiconductor dice, temporary electrical connections must be made to the integrated circuits on the dice. Typically, the electrical connections are made through contact locations, such as bond pads or test pads, formed on the faces of the dice. Testing at the wafer level can be performed using probe cards and a wafer probe handler. Probe cards include probe needles that electrically contact the contact locations on the wafer. Test circuitry associated with the wafer probe handler applies test signals through the probe card to the integrated circuits.
Testing can also be performed on dice that have been singulated from the wafer. In this case, temporary packages are adapted to house a single bare die on a burn-in board or other test apparatus. The temporary packages typically include an interconnect having contact members configured to electrically contact the contact locations on the die.
With wafer level testing, electrical connections must be made to the probe card. With die level testing, electrical connections must be made to the interconnect for the temporary package. These electrical connections are typically bonded connections. With bonded connections it can be difficult to separate a probe card from the wafer handler, or an interconnect from a temporary package, without damage. This makes replacing and interchanging the probe cards and interconnects difficult.
Another requirement of the connections to a probe card or interconnect is that the electrical connections must sometimes be capable of transmitting signals at high test speeds (e.g., 500 MHz). It is desirable to transmit test signals without generating parasitic inductance and cross coupling (i.e., "cross talk").
Often times the electrical connections with the probe card or interconnect are sources of parasitic inductance. For example, with temporary packages having wire bonded interconnects, it can be difficult to accurately space the bond wires from one another. Accordingly, capacitive coupling can occur between adjacent bond wires generating noise and spurious signals.
The problems of parasitic inductance and cross coupling can be compounded by the large number of bond pads contained on later generations of semiconductor dice. In particular, a large number of bond pads requires a corresponding number of electrical connections to the probe card or interconnect. It can be difficult to make these electrical connections without forming parasitic inductors and initiating cross talk and interconductor noise.
The present invention is directed to an improved interconnect capable of high speed testing of either wafers or singulated dice, with reduced parasitics inductance. In addition, non-bonded electrical connections can be made to the interconnect, such that removing and replacing the interconnect is facilitated.